Compute & Infrastructure
Top Line
China is preparing to allow select AI firms to purchase Nvidia H200 chips in limited quantities, a significant policy reversal that signals Beijing is prioritising AI competitiveness over blanket chip restriction compliance — and complicates US export control strategy.
SambaNova closed a $1 billion Series F at an $11 billion valuation with JPMorganChase confirmed as an on-premises inference customer, underscoring that enterprise demand for non-Nvidia inference silicon is moving from aspiration to deployment.
Meta announced a confirmed $10 billion commitment to build its first Canadian data centre, extending the hyperscaler buildout beyond US borders amid growing sovereign and regulatory pressure to diversify infrastructure geography.
JEDEC's new SPHBM4 standard targets the core cost driver in AI memory packaging by enabling HBM4-class bandwidth without silicon interposers, which — if adopted at scale — could materially reduce CoWoS packaging bottlenecks at TSMC.
China's Iluvatar CoreX raised $902 million in a Hong Kong follow-on after a 257% post-IPO rally, reflecting investor conviction in domestic Chinese AI silicon as a structural play independent of Nvidia access.
Key Developments
China's H200 Reversal: Strategic Pragmatism Undermines US Export Controls
According to The Information via Bloomberg, Beijing is preparing to permit a curated set of top Chinese AI companies to import Nvidia H200 chips under a controlled quota system. The H200 was previously restricted under US export licensing rules, making this a notable pivot — China is effectively seeking a negotiated carve-out rather than full domestic substitution. The move suggests Beijing has concluded that near-term AI model competitiveness requires access to leading-edge Nvidia silicon that domestic alternatives like Huawei Ascend and Iluvatar CoreX cannot yet replicate at scale.
The strategic implication for US policy is acute. Export controls premised on blanket denial are now being eroded through diplomatic back-channels, and any licensed H200 flow into China resets the capability baseline for Chinese frontier labs. It also raises questions about enforcement: limited quotas require verification mechanisms that have historically proven difficult to sustain. For Nvidia, the development is commercially significant but politically sensitive — any formal resumption of H200 sales to China would invite Congressional scrutiny.
Inference Silicon Competition Intensifies: SambaNova, Positron, and the Post-Nvidia Stack
Two significant capital raises this week signal accelerating investor conviction that inference workloads will not be winner-take-all for Nvidia. SambaNova closed a confirmed $1 billion Series F at an $11 billion valuation, with CEO Rodrigo Liang citing 'incredible demand for inferencing at high speeds' as the core thesis, per Bloomberg and Data Centre Dynamics. The JPMorganChase on-premises deployment is a confirmed anchor customer, not a letter of intent — this is live enterprise inference infrastructure running on SambaNova's Reconfigurable Dataflow Units. Separately, Positron is in active talks to raise $750 million at a $5 billion valuation, per Bloomberg, though this round has not closed and terms remain speculative.
The differentiation thesis for both companies rests on latency and total cost of ownership for inference, where Nvidia's H100/H200 architecture — optimised for training parallelism — faces genuine architectural trade-offs. SambaNova's dataflow approach and Positron's inference-first design are targeting the growing gap between what hyperscalers need for training and what enterprises need for production deployment. The risk is that Nvidia's own inference-optimised roadmap, combined with its software ecosystem lock-in, continues to compress the window of differentiation.
HBM Memory Squeeze: JEDEC's SPHBM4 Standard Targets Packaging Bottleneck
JEDEC has formally released the SPHBM4 standard, which enables HBM4-class memory bandwidth through a narrower 512-bit interface that eliminates the requirement for silicon interposers and CoWoS-style advanced packaging, per Tom's Hardware. This is directly targeted at the most acute supply constraint in the AI silicon stack: TSMC's CoWoS packaging capacity, which has been a hard ceiling on HBM-equipped GPU shipments since 2023. By enabling organic substrates instead of silicon interposers, SPHBM4 could open HBM-class memory to a broader set of packaging suppliers and reduce unit costs materially.
The timing intersects with a broader memory market dislocation. The AI HBM demand surge is directly pricing memory out of consumer devices — budget smartphone sales are projected to drop 22% as memory now constitutes up to 64% of lower-tier handset costs, per Tom's Hardware. This is a direct consequence of SK Hynix, Samsung, and Micron allocating fab capacity to HBM at the expense of commodity DRAM. SPHBM4 adoption timelines are not yet confirmed — standards release precedes commercial deployment, typically by 18-36 months for enterprise silicon.
China's Domestic Chip Ecosystem Capitalises: Iluvatar CoreX's $902 Million Raise
Shanghai Iluvatar CoreX Semiconductor raised approximately $902 million through a Hong Kong share sale following a 257% stock rally since its January IPO, per Bloomberg. The raise is confirmed and completed. Iluvatar CoreX produces AI accelerators for cloud and edge inference, positioning it as one of several domestic alternatives to Nvidia and Huawei Ascend. The capital raise comes precisely as Beijing contemplates limited H200 imports — a combination that reflects the dual-track nature of China's AI hardware strategy: pursue domestic capability while selectively accessing foreign silicon where the gap remains too large to bridge near-term.
The 257% post-IPO rally and oversubscribed follow-on indicate strong domestic institutional appetite for Chinese AI silicon exposure. This is partly policy-driven — state funds and domestic tech majors have incentives to support the ecosystem — but also reflects genuine revenue growth as Chinese cloud providers and AI labs diversify their accelerator supply chains away from Nvidia dependency under export control pressure.
Hyperscaler Geographic Expansion: Meta's $10 Billion Canadian Data Centre
Meta has confirmed a commitment of approximately $10 billion to build its first data centre in Canada, per Bloomberg. Location and power sourcing details have not been disclosed in available reporting. The investment continues the pattern of hyperscalers expanding beyond US borders driven by a combination of power availability, regulatory diversification, data sovereignty requirements, and proximity to talent. Canada offers hydroelectric power access in Quebec and British Columbia — critical given that AI training clusters at this scale require hundreds of megawatts of continuous power. Finland's data centre boom, detailed by Data Centre Dynamics, reflects the same dynamic in Europe: cold climate for free cooling, renewable power, and political stability attracting hyperscaler and sovereign compute investment simultaneously.
Signals & Trends
The Chip Cycle and Hyperscaler Cycle Are Beginning to Diverge
HP Board Director and VC founder Songyee Yoon articulated a structural tension that infrastructure analysts should track closely: the AI chip buildout cycle and the hyperscaler capex cycle are running on different clocks. Chip fabs and advanced packaging capacity require 3-5 year lead times, while hyperscaler spending decisions are increasingly sensitive to near-term inference revenue realisation. If hyperscalers begin moderating capex commitments — driven by investor pressure on AI ROI — demand signals to chip suppliers could turn negative before planned capacity comes online, creating the conditions for a hardware inventory cycle. The SambaNova and Positron raises suggest the market still prices continued demand growth, but the divergence risk is real and underappreciated in current valuation multiples.
Inference Specialisation Is Fracturing the AI Hardware Market by Workload
The simultaneous rise of inference-optimised startups (SambaNova, Positron), Nvidia's positioning of the Vera CPU as a single-threaded agentic inference advantage rather than a parallel training monster, and DeepSeek's reported move to develop its own inference chip all point to a structural fracturing of the AI hardware market. Training and inference are increasingly served by architecturally distinct silicon. DeepSeek developing a proprietary inference chip — per Data Centre Dynamics — would reduce its dependence on both Nvidia and Huawei, following the custom silicon path pioneered by Google (TPUs) and Amazon (Trainium/Inferentia). If frontier AI labs converge on custom inference silicon, the addressable market for merchant inference chips narrows to enterprises lacking the scale to justify custom development, reshaping the competitive dynamics for SambaNova and Positron.
South Korea's Memory Dominance Creates Both an Economic Windfall and a Systemic Concentration Risk
The IMF's decision to raise South Korea's growth forecast by the largest margin among major economies — explicitly attributed to AI-driven semiconductor demand per Bloomberg — confirms that HBM memory production at SK Hynix and Samsung is a macroeconomic force. But the same concentration that benefits Korea creates a systemic fragility: the entire AI silicon stack's memory layer runs through a single geography. The budget smartphone collapse, with memory costs at 64% of device BOM, is an early indicator of what demand-side distortion looks like when one application category captures a disproportionate share of a critical input. Any geopolitical disruption to Korean semiconductor production — whether through conflict escalation in the region or trade friction — would propagate immediately into AI cluster deployment timelines globally.
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