Compute & Infrastructure

Nvidia is promoting its Rubin-generation reference design for fully liquid-cooled data centres as having 'eliminated massive amounts of power usage and pretty much all water usage,' according to The Verge. The design runs at higher thermal densities than previous air-cooled or hybrid configurations, using facility-level liquid cooling loops that avoid the evaporative cooling towers responsible for the bulk of a data centre's water withdrawal. This is a strategically significant architectural shift: water consumption has become a flashpoint for municipal opposition to data centre permits, particularly in water-stressed regions of the US Southwest and parts of Europe.

The claim warrants scrutiny on two dimensions. First, 'eliminating water usage' at the facility level typically means shifting from evaporative cooling to dry or liquid-to-liquid heat exchange — water consumption moves rather than disappears entirely, depending on the cooling infrastructure upstream. Second, Nvidia's statement does not fully resolve the energy consumption concern; liquid cooling improves PUE but the absolute power draw of a Rubin-dense cluster is substantially higher than prior generations. The design nonetheless matters commercially because it gives hyperscalers a credible technical response to regulators demanding reduced environmental footprint per rack.

Arm-based servers accounted for nearly half of all server market revenue in Q1 2026, according to Tom's Hardware, with GPU clusters and high-end AI infrastructure cited as the primary drivers. This is a revenue-weighted figure — Arm unit share remains lower — but the revenue concentration reflects the fact that the highest-value deployments, specifically AI training and inference racks, are increasingly built on Arm-based host CPUs paired with accelerators. AWS Graviton, Ampere Altra, and NVIDIA's own Grace Hopper superchip architecture all fall into this category.

The implications for supply chain concentration are meaningful. Arm's licensing model means design wins are distributed across multiple fabless vendors rather than concentrated at Intel or AMD, reducing single-vendor risk at the CPU layer. However, nearly all high-volume Arm server silicon is fabricated at TSMC, meaning the architectural diversification does not translate into a reduction in foundry concentration. The shift also compresses Intel's addressable market in data centres more rapidly than prior forecasts suggested, with consequences for Intel's capacity utilisation and R&D investment cycles.

Chevron signed a 20-year power agreement with Microsoft to supply what could be one of the largest data centres in the US, located in West Texas, according to Bloomberg. Separately, Microsoft filed a proposed ratepayer-protection tariff with Nevada regulators as part of its Community-First AI Infrastructure initiative, per Data Centre Dynamics. Together these moves illustrate the two-front energy challenge hyperscalers now face: securing dedicated generation capacity at scale, and managing the political economy of grid impact on residential ratepayers.

The 20-year horizon of the Chevron deal is significant — it reflects the reality that new power generation at the scale required for gigawatt-class AI campuses cannot be financed without decade-plus offtake certainty. West Texas is an attractive siting choice given proximity to abundant wind and gas resources, but it also underscores that grid-constrained markets like Northern Virginia, the Pacific Northwest, and parts of the UK are effectively saturated for new large-scale AI deployments. The Nevada tariff proposal is a defensive regulatory move: by structuring a formal mechanism to prevent cost-shifting to residential customers, Microsoft is attempting to pre-empt the kind of ratepayer backlash that has delayed or blocked data centre power applications in other jurisdictions.

A detailed analysis from Semiconductor Engineering examines how rising photomask costs, tighter defect tolerances, and new materials requirements for high-NA EUV lithography are forcing chipmakers to weigh litho choices against production volume and total process cost. High-NA EUV — the next-generation lithography tool being commercialised by ASML — offers finer resolution for sub-2nm nodes, but the masks required are significantly more expensive to produce and more difficult to inspect and repair than conventional EUV masks.

This creates a structural tension in the supply chain: the tooling that enables the most advanced nodes is economically viable only at volumes that currently only TSMC and potentially Samsung can sustain. Intel's ambitions to reach competitive leading-edge nodes depend on navigating the same mask cost curve. The chokepoint is not the ASML tool itself — it is the supporting ecosystem of mask blanks, pellicles, inspection equipment, and repair systems, most of which are concentrated among a small number of Japanese and European suppliers. Disruption at any of these sub-tiers can delay an entire node generation's ramp.

DDR2 memory contract prices surged 55–60% in Q2 2026 and are projected to rise a further 35–40% in Q3, according to Tom's Hardware. The mechanism is straightforward: AI infrastructure demand for HBM and DDR5 has absorbed DRAM fab capacity, prompting manufacturers to reduce allocations to legacy node production. Industrial, automotive, and embedded markets that depend on DDR2 — which has no modern substitute in many legacy system designs — are absorbing the price shock. This is a leading indicator of broader supply chain stress: when shortages propagate to products manufactured on nodes that have been fully depreciated for over a decade, available capacity slack across the entire DRAM industry is effectively exhausted.

On the software stack side, Qualcomm is in advanced talks to acquire AI infrastructure software company Modular Inc. at approximately $4 billion, per Bloomberg. Modular develops compiler and runtime infrastructure — its MOJO language and MAX inference engine — that abstracts AI workloads across heterogeneous hardware. For Qualcomm, the acquisition would address a persistent weakness: its silicon for AI inference at the edge and in data centres is competitive on power efficiency but has lacked the software ecosystem depth to displace NVIDIA's CUDA-anchored stack. This is an announced deal in advanced talks, not a confirmed close.