Compute & Infrastructure

Samsung Electronics crossed the $1 trillion market capitalisation mark following a more-than-fourfold share price increase over the past year, driven by surging demand for high-bandwidth memory and DRAM used in AI accelerator systems. Bloomberg reports this places Samsung alongside TSMC as the only semiconductor companies at this valuation level — a pairing that reflects how both logic fabrication and memory packaging have become equally indispensable to the AI compute stack.

The valuation milestone matters structurally because it signals capital market recognition that memory is no longer a commodity layer subordinate to logic. With HBM supply constrained and leading-edge packaging capacity concentrated between Samsung and SK Hynix, any disruption to Korean memory production now carries systemic risk for AI accelerator supply globally. Simultaneously, academic research from UCSD, Columbia, and Samsung itself is exploring PNM-enabled HBM architectures that could further increase HBM's strategic role by offloading compute tasks directly onto memory stacks, reinforcing the long-term demand trajectory. Semiconductor Engineering

Huawei is projecting $12 billion in AI chip revenue for 2026 — a figure Tom's Hardware describes as based on confirmed orders from Alibaba, ByteDance, and Tencent, representing at least 60% year-over-year growth. The report also notes that Chinese fabrication capacity is struggling to keep pace, pointing to SMIC's 7nm-class process as a persistent bottleneck. This is a confirmed demand signal, not a projection: major hyperscalers have already committed procurement, which means the substitution of NVIDIA silicon in China is no longer a policy aspiration but an operational reality.

Jensen Huang's public statement that China should not have access to Blackwell or Rubin-generation GPUs — framing it as US hardware leadership being non-negotiable — Tom's Hardware contextualises the Huawei trajectory. Export controls have effectively forced Chinese hyperscalers to accelerate domestic adoption on a timeline they did not choose, compressing what might have been a decade-long substitution into three to four years. The key unresolved question is whether Huawei's Ascend architecture, running on SMIC-fabricated silicon, can match NVIDIA's performance-per-watt at scale — something that fabrication constraints at mature nodes make structurally difficult.

China's government has formally set a target of 70% domestic sourcing for silicon wafers, with firms including Eswin scaling 12-inch production to support the goal. Tom's Hardware frames this as a direct response to export restrictions and the AI infrastructure build-out. Silicon wafers — alongside photoresists and certain process gases — represent one of the few upstream inputs where Japan and Germany retain significant leverage over Chinese chip production. A credible move to 70% domestic wafer supply would meaningfully insulate Chinese fabs from further upstream restrictions.

The 70% figure is an announced policy target, not a confirmed operational capacity. Eswin's ramp is real but the quality parity of domestic 12-inch wafers with Shin-Etsu or SUMCO product at advanced nodes remains unverified publicly. Wafer quality at sub-10nm geometries is significantly more demanding than at the mature nodes where Huawei's Ascend chips are currently fabricated — meaning this initiative matters most at the 7nm-class and above segments where SMIC operates, and less immediately for cutting-edge logic.

Alan Schwartz of Guggenheim Partners used the Milken Institute Global Conference to argue that the US risks falling behind in AI development specifically because of electricity grid inadequacy — Bloomberg reporting his language as framing this as an AI race risk rather than a standard infrastructure gap. This escalation in framing — from operational headache to competitive vulnerability — reflects a growing consensus among capital allocators that power is now the binding constraint on US AI infrastructure expansion, more so than chip availability.

The commercial evidence supports the concern. Infineon's stronger-than-expected revenue forecast was attributed partly to AI infrastructure power management demand, Bloomberg noting that the German chipmaker is benefiting directly from data centre power system buildout. Meanwhile Alphabet tapped the Euro debt market in a six-tranche bond offering to fund AI capital expenditure, Bloomberg indicating that hyperscaler capital formation is now global in scope. The combination of constrained grid interconnection queues, transmission bottlenecks, and permitting timelines means that announced data centre capacity is materially different from capacity that will be energised on the projected schedule.

Panthalassa, a startup building wave-powered offshore AI data centre nodes, raised $140 million with backing from Peter Thiel, according to Tom's Hardware. The concept addresses both energy sourcing and cooling simultaneously — ocean-based installations have access to seawater cooling and can co-locate generation with compute. At $140 million, this is no longer a conceptual exploration; it represents a serious infrastructure bet that grid-connected land-based deployment is too constrained to meet demand.

Offshore compute nodes face significant operational, regulatory, and latency challenges that land-based facilities do not. Subsea infrastructure maintenance costs, storm resilience requirements, and jurisdictional ambiguity over offshore installations are non-trivial engineering and legal problems. The investment signals that capital is willing to absorb those costs as an alternative to competing for scarce grid connections onshore — a telling indicator of how acute the land-and-power constraint has become. Whether wave energy can deliver reliable baseload power at the density AI workloads require remains technically unproven at this scale.