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Compute & Infrastructure

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Top Line

ASML raised its full-year 2026 sales forecast, confirming that AI-driven semiconductor capex continues to absorb leading-edge lithography capacity and reinforcing the company's chokepoint status in the global chip supply chain.

Meta and Broadcom announced an expanded multibillion-dollar custom chip partnership, accelerating the hyperscaler shift away from NVIDIA merchant silicon toward vertically integrated ASIC strategies.

China's chipmaking subsidies totalled $142 billion between 2014 and 2023 — 3.6 times the US CHIPS Act commitment — reframing the subsidy competition as structurally lopsided rather than a close race.

Microsoft absorbed Norway Stargate data centre capacity originally designated for OpenAI, a quiet but telling signal of how fluid and commercially contingent the Stargate buildout narrative remains.

Italy granted €211 million to 2D Photonics for data centre photonics technology, illustrating the acceleration of European sovereign compute investments targeting the AI infrastructure layer rather than just cloud services.

Key Developments

ASML Forecast Upgrade Cements Lithography as the AI Supply Chain's Tightest Chokepoint

ASML raised its full-year 2026 revenue guidance on the back of sustained AI infrastructure investment, according to Bloomberg. The revision is analytically significant not just as a financial update but as a real-time demand signal: ASML's EUV and high-NA EUV systems are the irreplaceable bottleneck in producing leading-edge logic at 3nm and below, and their order book is a direct proxy for how seriously the industry is treating AI compute buildout. No alternative supplier exists for high-NA EUV at any price.

The forecast upgrade comes despite ongoing US export controls that restrict ASML's ability to ship advanced tools to China. That those restrictions have not suppressed ASML's growth trajectory confirms that demand from TSMC, Samsung, Intel Foundry, and their hyperscaler customers is more than compensating. The strategic risk here is concentration: any disruption to ASML's Veldhoven manufacturing operations — whether from geopolitical pressure, supply of specialised components, or physical capacity — propagates immediately across every leading-edge AI chip programme globally.

Why it matters

ASML's monopoly on advanced lithography means its capacity and geopolitical exposure set a hard ceiling on how fast the global AI compute stack can scale.

What to watch

Whether ASML accelerates high-NA EUV tool shipments to TSMC's Arizona fabs, which would directly affect the timeline for US-domestic leading-edge chip production reaching meaningful volume.

Meta-Broadcom ASIC Expansion and the Erosion of NVIDIA's Hyperscaler Lock-In

Meta and Broadcom announced a deepened multibillion-dollar custom silicon partnership, with Broadcom leading the design and manufacturing coordination of Meta's next-generation AI accelerators, per Bloomberg. The departure of Broadcom CEO Hock Tan from Meta's board — likely to resolve conflict-of-interest concerns as the commercial relationship intensifies — underscores that this is a serious, long-term infrastructure commitment rather than a hedge.

The strategic logic is straightforward: at Meta's inference scale, a purpose-built ASIC optimised for its specific model architectures delivers meaningfully better performance-per-watt and total cost of ownership than NVIDIA GPUs. Google (TPUs), Amazon (Trainium/Inferentia), and Microsoft (Maia) have pursued the same path. The cumulative effect is that NVIDIA's addressable hyperscaler market for inference workloads is structurally shrinking, even as overall AI compute spend grows. NVIDIA retains dominance in training and in enterprises lacking the engineering scale to build custom silicon, but the high-volume, high-predictability inference workloads — the ones that justify NVIDIA's premium pricing — are migrating.

Why it matters

Each hyperscaler ASIC programme that matures reduces NVIDIA's ability to price at monopoly margins and narrows the GPU market to segments where custom silicon economics don't work.

What to watch

Meta's disclosed performance benchmarks for its next ASIC generation relative to NVIDIA's Blackwell successor, which will set the competitive reference point for the 2027-2028 procurement cycle.

Sovereign Compute Investments: Japan's Rapidus, Italy's 2D Photonics, and the China Subsidy Gap

Three distinct sovereign compute stories landed simultaneously. Italy awarded a confirmed €211 million grant to 2D Photonics, a startup targeting photonic interconnects for AI data centres, per Bloomberg. This is a notable strategic choice: rather than funding another generic cloud facility, Italy is backing a technology layer — silicon photonics — that addresses the interconnect bandwidth bottleneck constraining dense GPU clusters. Japan's Rapidus, meanwhile, remains on track for 2nm production in 2027, supported by substantial government backing, with TSMC simultaneously expanding its own Japanese manufacturing footprint, per The Register. The Rapidus timeline is still classified as an announced plan, not confirmed production capacity.

The China subsidy data provides the starkest framing: $142 billion in chipmaking industrial policy between 2014 and 2023, versus $39 billion committed under the US CHIPS Act, per Tom's Hardware. Raw subsidy volume does not translate directly into leading-edge capability — China remains blocked from EUV access and has not demonstrated 5nm-class volume production — but at mature nodes, the capital deployed is enabling rapid capacity expansion that reshapes the economics of legacy chip supply chains. The gap also raises questions about CHIPS Act adequacy if a second tranche of US funding is not authorised.

Why it matters

Governments are now competing on specific technology layers within the AI compute stack, not just generic semiconductor capacity, making subsidy strategy more targeted and the geopolitical fragmentation of supply chains more granular.

What to watch

Whether Rapidus secures a committed anchor customer for its 2nm capacity before production begins — without one, the programme remains a national prestige project rather than a commercial supply chain node.

Microsoft's Absorption of Norway Stargate Capacity Exposes Fluidity in OpenAI Infrastructure Plans

Microsoft has agreed to take over data centre capacity at a Norway facility originally contracted for OpenAI and marketed under the Stargate brand, per Bloomberg. The Stargate initiative — the $500 billion US AI infrastructure programme announced with considerable fanfare in early 2025 — has always bundled confirmed near-term investments with speculative long-term commitments. This transaction illustrates the gap: capacity provisioned in OpenAI's name is being quietly redistributed to Microsoft, its primary commercial partner and investor, suggesting OpenAI's own infrastructure absorption is either slower than marketed or being consolidated elsewhere.

For infrastructure planners, the more important signal is that hyperscale data centre deals are being structured with enough flexibility to reassign capacity across related parties. This reflects the difficulty of accurately forecasting AI workload growth 18-36 months out. The Norway location also carries specific strategic weight: Nordic data centres benefit from cold climates reducing cooling energy costs and access to renewable hydroelectric power, making them economically attractive for energy-intensive AI training runs.

Why it matters

The reassignment suggests Stargate's geographic and organisational buildout is being renegotiated in real time, which matters for evaluating the credibility of future sovereign infrastructure announcements that cite Stargate as an anchor.

What to watch

Whether OpenAI redirects its data centre contracting toward US domestic Stargate sites or signals a reduced direct infrastructure footprint in favour of Microsoft-operated capacity.

Signals & Trends

AI-Accelerated Chip Design Is Compressing the NVIDIA-to-NVIDIA Competitive Cycle

NVIDIA's disclosure that AI tools have reduced a 10-month, eight-engineer GPU design task to an overnight job — while acknowledging that fully autonomous chip design remains distant, per Tom's Hardware — has a structural implication that cuts both ways. If NVIDIA can iterate on GPU architectures faster, it extends its competitive moat by shortening product cycles. But the same capability is available to Broadcom, AMD, and the hyperscaler ASIC teams. The net effect is that design cycle compression accelerates the entire competitive landscape, not just NVIDIA's position within it. Watch for this to manifest in tighter-spaced product generations across all leading AI chip vendors through 2027-2028.

AI Bot Traffic as a Data Centre Demand Multiplier Requires Revised Infrastructure Sizing Models

Lumen's CEO reporting that AI bots now constitute over half of global internet traffic, per Bloomberg, is a network-layer signal with direct data centre implications. Inference infrastructure must now be sized not just for human-initiated queries but for machine-to-machine AI traffic at scale — crawlers, API agents, synthetic data pipelines, and automated decision loops. This shifts the demand forecasting problem: traditional models anchored to human user growth rates systematically undercount the compute required to serve agent-driven workloads, which are both higher in volume and more bursty in character. Infrastructure planners relying on pre-2025 demand curves for capacity decisions are likely building to a systematically low specification.

Photonics Funding Signals That Interconnect Bandwidth Is Becoming the Binding Constraint in AI Clusters

Italy's decision to direct €211 million specifically at photonic data centre technology, rather than funding compute nodes or real estate, reflects a maturing understanding among sophisticated infrastructure investors that GPU utilisation is increasingly throttled by interconnect bandwidth rather than raw processing power. As AI model sizes and cluster densities grow, the copper interconnects and conventional optical transceivers that link GPUs within and between racks become the performance bottleneck. Silicon photonics — integrating optical components directly into chip packages — addresses this but remains expensive and manufacturing-intensive. The Italian grant, alongside broader industry investment in co-packaged optics by Intel, Broadcom, and TSMC's packaging arm, signals that interconnect is moving from a peripheral concern to a first-order infrastructure design variable.

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